1. Field of the Invention
The present invention relates to a reference current circuit for generating a constant reference current based on a reference voltage, and more particularly to such a reference current circuit with influence of variation in its manufacturing process mitigated by means of trimming.
2. Description of the Background Art
Reference will be first be made to FIG. 3 for describing a conventional reference current circuit for better understanding a reference current according to the invention. FIG. 3 is a schematic circuit diagram. This reference current circuit is adapted to output a current Iout based on a reference voltage Vref and has a differential amplifier (AMP) 1 in which the reference voltage Vref is applied to its inverting input terminal. The differential amplifier 1 has its output terminal connected to the gate electrode of a p-channel metal-oxide semiconductor (PMOS) transistor 2. The PMOS transistor 2 has its source electrode connected to a supply voltage VDD and its drain electrode connected to a node NA which connects to ground GND via a current regulation resistance 3. The current regulation resistance 3 is provided with a plurality of regulation taps, either one of which is selected by a switch 4 so that the current regulation resistance 3 connects to the non-inverting input terminal of the differential amplifier 1. In FIG. 3, the tap selected by the switch 4 is depicted as node NB.
In the figure, reference numerals 3a and 3b denote the resistance Ra between the nodes NA and NB, and the resistance Rb between the node NB and the ground GND, respectively. These resistances 3a and 3b carry voltages Va and Vb, respectively, which have a relationship with the voltage Vds applied to the PMOS transistor 2 (which becomes a current source) as expressed by following expression (1):Vds+Va+Vb=VDD  (1)
Since, in the differential amplifier 1, the feedback is effected, the output voltage is controlled such that the voltages applied to the inverting and non-inverting input terminals become equal to each other, i.e. the voltage Vb is equal to the voltage Vref. Therefore, the above expression (1) can be expressed by following expression (2):VDD−Vref=Vds+Va  (2)
When the amount of current passing through the PMOS transistor 2 is Iout, the voltages Vds and Va can be as expressed by following expressions (3) and (4):Va=Ra×Iout  (3)Vb=Vref=Rb×Iout  (4)
Therefore, the current amount of the output current Iout, which is equal to Vref/Rb, can be decided by using the resistance value Rb which is obtained by adjusting the ratio of the resistance (Ra:Rb) to the total resistance value (Ra+Rb) of the resistance 3 as having the switch 4 selecting one of the taps of the resistance 3.
Such a conventional reference current circuit is disclosed, for example, by Japanese patent laid-open publication No. 2000-75947 and U.S. patent application publication No. 2007/0108957 A1 to Noda.
The conventional reference current circuit, however, generates a voltage Va (=Ra×Iout) by the output current Iout flowing through the adjusting resistance 3a. Assuming that the voltage Vds is constant, it is necessary to increase the value of right-hand side in expression (2), i.e. VDD−Vref, by the amount of the voltage Va generated across the resistance 3a. For this reason, it is difficult to drive the conventional reference current circuit at a low supply voltage such as VDD=about 1.2 V.